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LTC6951IUHF#PBF
IC CLOCK SYNTHESIZER PLL 40QFN
- 제조업체
- Mfr.부분 #LTC6951IUHF#PBF
- 패키지 40-WFQFN Exposed Pad
- 데이터시트 LTC6951IUHF#PBF DataSheet
- 재고 있음861
100% 원래 &새로운
배송 준비 24 시간
365 일 보장
RFQ 및더 많은 할인
사양
| Supplier | Analog Devices Inc. |
| Package | Tube |
| ProductStatus | Active |
| PLL | Yes |
| Input | Clock |
| Output | CML, LVDS |
| NumberofCircuits | 1 |
| Ratio-Input:Output | 1:5 |
| Differential-Input:Output | Yes/Yes |
| Frequency-Max | 2.5GHz |
| Divider/Multiplier | Yes/No |
| Voltage-Supply | 3.15V ~ 3.45V |
| OperatingTemperature | -40°C ~ 105°C |
| MountingType | Surface Mount |
| Package/Case | 40-WFQFN Exposed Pad |
개요
Description
- Low jitter, fast lock, and clock multiplication/division capability
- Multiple outputs and configurable output formats (LVDS/LVPECL/HCSL, etc.)
- Simple control for frequency ratios and operation
- Power-efficient, suitable for industrial temperature ranges
The suffixes:
- IUHF denotes the specific package/temperature variant
- #PBF indicates Pb-free, RoHS-compliant manufacturing
For exact electrical specs, package details, and usage, refer to the LTC6951 datasheet and the product page.
Features
- Low-jitter, high-precision clock synthesizer with PLL
- Programmable frequency (integer and fractional-N options) from a reference
- Multiple outputs with selectable formats (LVDS/LVPECL/CMOS) and adjustable drive
- Fast lock time with good output-to-output alignment
- Serial control interface for programming and status readback
- Low power operation over a wide temperature range
- RoHS-compliant, lead-free package (PBF) in a compact IUHF package
- Suitable for clock distribution and timing recovery in high-speed systems
For exact electrical specs, supply range, and package details, please consult the datasheet.
Package
Pinout
- Function: High‑precision PLL clock generator/jitter cleaner that takes a reference clock and produces a low‑jitter output clock (clock synthesis/distribution).
Manufacturer
What kind of company: A multinational semiconductor company specializing in analog and mixed-signal integrated circuits (and related processing ICs).
Application
- High-speed digital systems needing low-jitter clocks
- Clock distribution for FPGAs/ASICs and SerDes (PCIe, SATA, USB, Ethernet)
- Reference clock generation and jitter cleaning in telecom/network equipment
- Data-center, server, and storage timing networks
- Instrumentation, test equipment, and military/aerospace timing references
- Any design requiring multiple synchronized differential clock outputs with tight skew/jitter specs
Equivalent
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