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SI5326A-C-GM

Name: SI5326A-C-GM
Rating: 4.7 (12 reviews)

IC ANY-RATE MULTI/ATTEN 36-QFN

제조업체
Mfr.부분 #SI5326A-C-GM
패키지 36-VFQFN Exposed Pad
데이터시트 SI5326A-C-GM DataSheet
재고 있음7190

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100% 원래 &새로운

배송 준비 24 시간

365 일 보장

RFQ 및더 많은 할인

사양

Supplier	Skyworks Solutions Inc.
Package	Tray
Series	DSPLL®
ProductStatus	Active
Type	Clock Multiplier, Jitter Attenuator
PLL	Yes
Input	LVCMOS, LVDS, LVPECL, Crystal
Output	CML, LVCMOS, LVDS, LVPECL
NumberofCircuits	1
Ratio-Input:Output	3:2
Differential-Input:Output	Yes/Yes
Frequency-Max	1.4GHz
Divider/Multiplier	Yes/Yes
Voltage-Supply	1.71V ~ 3.63V
OperatingTemperature	-40°C ~ 85°C
MountingType	Surface Mount
Package/Case	36-VFQFN Exposed Pad

개요

Description

Si5326A-C-GM is a high-performance, multi-output, I2C‑programmable clock generator/jitter cleaner from Silicon Labs. It takes a reference clock input and uses a fractional‑N PLL to synthesize several low‑jitter output clocks that are phase‑aligned and suitable for timing-sensitive SERDES and system clocks. It supports programmable output frequencies, output enables, and spread‑spectrum clocking to reduce EMI. Control is via I2C registers, allowing flexible configuration in telecom, data‑communications, storage, and motherboard timing applications. The A/C/GM suffix indicates device revision/version and RoHS‑compliant packaging (GM typically denotes a RoHS QFN package). For exact input ranges, output formats, jitter specs, and register map, consult the Si5326A-C-GM datasheet and programming guide.

Features

Here are the typical features of the SI5326A-C-GM (Silicon Labs):
- High-performance jitter cleaner and clock generator with programmable frequency synthesis
- Supports multiple output formats (LVDS, LVPECL, CML, and CMOS) with configurable drive
- Flexible output architecture: multiple independent outputs with enable/disable control
- I2C (and/or 2-wire) programmable interface for frequency programming, format selection, and status monitoring
- Fractional/Integer-N PLL capability for precise clock generation
- Spread-spectrum clocking to reduce EMI
- Very low phase noise and RMS jitter for high-precision timing applications
- Power-saving features and fault protection, with low overall current draw
- GM-grade/industrial temperature range options and RoHS-compliant packaging
Note: Exact output count, input reference range, and voltage/power specs vary by package variant; refer to the datasheet for the specific A-C-GM variant you’re using.

Package

The SI5326A-C-GM is in a 16‑pin QFN package (about 3x3 mm). For exact dimensions, refer to the datasheet.

Pinout

- Pin count: 16 pins (GM package)
- Function: High-performance jitter-cleaning clock generator and distribution buffer. It takes a reference clock and provides multiple low-jitter clock outputs (PLL-based jitter attenuation and clock distribution).

Manufacturer

Manufacturer: Silicon Labs (Silicon Laboratories).
Kind of company: A fabless semiconductor company that designs and markets integrated circuits and software for embedded systems, including timing and wireless solutions.

Application

- Multi-output, low-jitter clock generation and distribution for FPGAs/ASICs
- Synthesis from an external reference (XO/VCXO/TCXO) to required frequencies
- Jitter cleaning and phase alignment for high-speed SERDES
- Clocking solutions for telecom/datacom backplanes and data-center equipment
- Used in storage systems, servers, test/measurement gear, automotive/industrial timing